QuickLogic Showcases eFPGA Chiplet Integration on Intel 18A at Chiplet Summit 2026

QuickLogic to spotlight eFPGA chiplet deployment at Chiplet Summit 2026

QuickLogic is exhibiting and delivering a technical presentation at Chiplet Summit 2026 in Santa Clara, where it highlights how embedded FPGA (eFPGA) chiplets enable post‑silicon adaptability and flexible heterogeneous integration on advanced process nodes.

eFPGA chiplet integration on Intel 18A as a platform enabler

QuickLogic is presenting a technical session titled “Enabling Flexible Heterogeneous Integration with an eFPGA Chiplet on Intel 18A,” which demonstrates using an eFPGA chiplet to add post‑silicon programmability and platform flexibility. The company frames the approach as a means for developers, system architects and OEMs to address late‑stage changes or feature updates without requiring a full silicon respin, citing deployment examples on Intel 18A to illustrate integration pathways.

The presentation and supporting demonstrations focus on tradeoffs between power, performance and area when embedding eFPGA chiplets within chiplet stacks and advanced packages. QuickLogic outlines how its eFPGA Hard IP and chiplet form factors permit designers to offload functions, accelerate AI endpoints and tune system behavior after fabrication, arguing this capability is particularly relevant for aerospace, defense and industrial applications that require long field lifecycles and ruggedized solutions.

QuickLogic also positions eFPGA chiplets as a route to heterogeneous systems that combine discrete FPGAs, dedicated accelerators and standard SoCs without sacrificing low‑power operation. The session, delivered by Trey Peterson, Applications Engineer at QuickLogic, is scheduled for Session E‑202 on Thursday, Feb. 19 from 3:00 p.m. to 4:20 p.m. and uses Intel 18A as a concrete reference point to help attendees evaluate integration complexity and expected system outcomes.

Exhibit details and engagement opportunities

QuickLogic is exhibiting at Booth 416 and is available for demos and technical discussions during exhibit hours on Wednesday, Feb. 18 from 12:30 p.m. to 8:00 p.m. and Thursday, Feb. 19 from 12:00 p.m. to 3:00 p.m., where engineers discuss integration options, power/performance tradeoffs and AI endpoint acceleration.

Company positioning and outreach

The company reiterates its focus on eFPGA Hard IP, discrete FPGAs, endpoint AI solutions and open source toolchains aimed at low‑power, highly customizable products for aerospace, defense, industrial, computing and consumer markets. The announcement is issued via PR Newswire and points attendees to QuickLogic’s website for further technical collateral and demo requests.